Method and apparatus for initiating and controlling test modes w

Details Method and apparatus for initiating and controlling test modes w Method and apparatus for initiating and controlling test modes w

1997-06-30

1999-06-22

Canney, Vincent P.

Excavating

G06F 1100

Patent

active

059149680

ABSTRACT:
The method for initiating and controlling integrated circuit testing includes providing a plurality of test modes with each test mode having a corresponding test mode address vector. A test enable cycle is enabled by executing an unlock enable cycle with a predetermined lockout address vector and at least one particular test mode of the plurality of test modes is initiated by executing the test enable cycle with a test mode address vector corresponding to the at least one particular test mode. The method may also include latching the at least one particular test mode of the plurality of test modes, detecting supply voltage applied to the integrated circuit, and clearing the latched at least one particular test mode as a function of the detected supply voltage. The test enable cycle may also include a supervoltage test enable cycle executable with a supervoltage.

REFERENCES:
patent: 4631702 (1986-12-01), Korba
patent: 4896296 (1990-01-01), Turner et al.
patent: 5373227 (1994-12-01), Keeth
patent: 5384739 (1995-01-01), Keeth

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