Traffic shaper apparatus

Multiplex communications – Data flow congestion prevention or control

Patent

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Details

370416, 370253, 370229, 34082552, H04L 700

Patent

active

059149353

ABSTRACT:
A traffic shaper apparatus includes a ring memory, a counter, a schedule circuit, first-priority available area determining circuits, and a storage area determining circuit. The ring memory has a plurality of storage areas for storing cells to be transmitted to an asynchronous transfer mode (ATM) communication network. The counter performs read control of cells at a predetermined read rate by cyclically accessing the storage areas in the ring memory. The schedule circuit obtains an ideal transmission time of a cell to be transmitted to the ATM communication network in accordance with input of a cell. The first-priority available area determining circuits are arranged in correspondence with a plurality of sectors obtained by grouping the storage areas in the ring memory to concurrently search for available storage areas in the respective sectors from which cells are read out at times nearest the ideal transmission time. The storage area determining circuit searches the respective search results obtained by the first-priority available area determining circuits for an available storage area from which a cell is read out at the time nearest the ideal transmission time.

REFERENCES:
patent: 5107260 (1992-04-01), Meissner et al.
patent: 5581546 (1996-12-01), Roosma et al.
patent: 5774466 (1998-06-01), Hanmamoto et al.
"Development of UPC and Shaping LSI for ATM network", Proceedings of the 1995 Communications Society Conference of the Institute of Electronics, Information and Communication Engineers, Communication Technical Report, B-560, p. 227, Sep. 1995.

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