Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent
1997-08-22
1999-06-22
Nelms, David
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
365233, 365205, 365207, 365208, 36518908, G11C 800
Patent
active
059149094
ABSTRACT:
A semiconductor memory device having a data bus sense amplifier driving part for driving a data bus sense amplifier in a read mode in response to a global data bus line selection signal and a data bus line selection signal, a write driver driving part for driving a write driver in a write mode in response to the data bus line selection signal and a write bus line driver signal generation signal, and a logic gate for logically combining output signals from the data bus sense amplifier driving part and write driver driving part to generate a signal to drive the data bus sense amplifier in the write and read modes. The data bus sense amplifier is driven even in the write mode to change the previous data latched by a latch circuit. Therefore, in the case where data stored in a cell in the write mode is outputted in the read mode by a corresponding address and different data is then stored in the same cell, the different data can normally be read directly by the corresponding address without performing a read or write operation according to a different address.
REFERENCES:
patent: 4858197 (1989-08-01), Aono et al.
patent: 5404327 (1995-04-01), Houston
patent: 5666324 (1997-09-01), Kosugi et al.
Hyundai Electronics Industries Co,. Ltd.
Nath Gary M.
Nelms David
Nguyen Vanthu
Novick Harold L.
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