Hierarchical synchronization method

Multiplex communications – Communication techniques for information carried in plural... – Combining or distributing information via time channels

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370503, H04J 306

Patent

active

058417796

DESCRIPTION:

BRIEF SUMMARY
This application claims benefit of international application PCT/Fl95/00095, filed Feb. 23, 1995.


BACKGROUND OF THE INVENTION

The invention relates to a hierarchical synchronization method which is used in a telecommunications system employing message-based synchronization. The invention also relates to node equipment realizing such a method.
In this presentation, the junction points of the transmission lines in a telecommunication system are called nodes. A node may be any device or equipment capable of affecting clock synchronization, such as a branching or cross-connection means. The latter is used as an example in the more detailed description of the invention below.
Nodes in a telecommunications system utilizing message-based synchronization are interconnected by transmission lines which the nodes use for data transmission. These lines also forward the clock frequency of the transmitting party to the receiving party. Each node selects as the source of its own clock frequency either the frequency of a signal from a neighboring node, the frequency of its own internal clock source, or a frequency brought into the node from an external clock source through a separate synchronization input. In order that all nodes in the system will operate at the same clock frequency, the aim is usually to make the system synchronize itself with a single clock source called a master source. All system nodes connected directly to the selected master source are thus synchronized with the master source while nodes connected to the nodes adjacent to the master source but not directly connected to the master source are synchronized with these adjacent nodes. Accordingly, each node at a greater distance from the master source synchronizes itself with a node one node spacing closer to the master source.
In order that the above-described synchronization hierarchy can be established within the system, the system nodes interchange synchronization messages. These messages contain information by means of which individual nodes are able to select a timing source. The system nodes are prioritized and the system tends to synchronize itself with the clock frequency of a node having the highest level of priority. Normally each priority level is assigned to a single system node. Synchronization messages normally contain information about the origin of the clock frequency of the node transmitting the message and the priority of the node as well as a value describing the quality of the clock signal. Accordingly, a neighboring clock frequency which originates from a desired node and which is of the highest quality can be selected by an individual node as the source of its own clock frequency.
At the system start-up, each node selects its own internal clock source as the source of its clock frequency as it has not yet processed any incoming synchronization messages. After the node has processed the first incoming synchronization messages, it selects the clock frequency of a neighboring node having the highest level of priority as the source of its clock frequency. After all messages have been distributed over the system and the system has achieved a stable state as far as synchronization is concerned, the system has been synchronized hierarchically with the clock frequency of the master source.
FIG. 1 shows a system utilizing message-based synchronization in a stabilized situation. Priorities assigned to the nodes are indicated by numbers within the circles representing the nodes. The smaller the number, the higher the priority of the node. Synchronization messages transmitted by a node n (n=1 . . . 6) are indicated by the reference MSG.sub.n. Synchronization messages transmitted by different nodes usually differ from each other and depend on the applied message-based synchronization method. The distribution of the clock frequency from the master clock (node 1) to the other system nodes is illustrated by solid lines. Internodal connections drawn by broken lines are not used in a normal situation for system synchronization, but they are avai

REFERENCES:
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patent: 4837850 (1989-06-01), Maisel et al.
patent: 5696799 (1997-12-01), Kainulainen
International Telecommunication Union, CCITT, General Aspects of Digital Transmission Systems, Terminal Equipments, Physical/Electrical Characteristics of Hierarchical Digital Interfaces, Recommendation G.703, pp. 1-39, Geneva, 1991.
International telecommunications Union, CCITT, General Aspects of Digital Transmission Systems, Terminal Equipments, Synchronous Frame Structures Used . . . , Recommendation G.704, pp. 1-31, Geneva, 1991.
International Telecommunication Union, ITU-T, Digital Transmission Systems, Terminal Equipments, General, Network Node Interface For the Synchronous Digital Hierarchy (SDH), Series G: Transmission Systems and Media, Recommendation G.707 (Mar. 1996), pp. 1-129.
International Telecommunication Union, ITU-T, General Aspects of Digital Transmission Systems, Network Node Interface for the Synchronous Digital Hierarchy, Recommendation G. 708 (Mar. 1993), pp. 1-16.
International Telecommunication Union, ITU-T, General Aspects of Digital Transmission System, Synchronous Multiplexing Structure, Recommendation G.709 (Mar. 1993), pp. 1-53.
M68HC11 Reference Manual, Rev. 3, Motorola Inc., 1991, Section 9, Asynchronous Serial Communications Interface, pp. 9-1--9-34.

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