Low supply voltage negative charge pump

Details Low supply voltage negative charge pump Low supply voltage negative charge pump

1996-02-15

1997-03-18

Fears, Terrell W.

Static information storage and retrieval

Powering

365218, 36518533, G11C 1300

Patent

active

056129211

ABSTRACT:
A low supply voltage negative charge pump for generating a relatively high negative voltage to control gates of selected memory cells via wordlines in an array of flash EEPROM memory cells during flash erasure includes charge pump means (210) formed of a plurality of charge pump stages (201-206) and coupling capacitor means (C201-C212) for delivering clock signals to the plurality of charge pump stages. Each of the plurality of charge pump stages is formed of an N-channel intrinsic pass transistor (N1-N6), an N-channel intrinsic initialization transistor (MD1-MD6), and an N-channel intrinsic precharge transistor (MX3-MX7, MX1) which are disposed in separate p-wells so as to reduce body effect. As a result, the negative charge pump is operable using a supply voltage of +3 volts or lower.

REFERENCES:
patent: 5400286 (1995-03-01), Chu et al.

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