Static information storage and retrieval – Powering
Patent
1995-09-19
1997-03-18
Popek, Joseph A.
Static information storage and retrieval
Powering
36518909, 36518911, G11C 800
Patent
active
056129203
ABSTRACT:
Voltage down converter of a semiconductor memory device shown includes a reference voltage generating circuit, a current mirror amplifier for comparing the reference voltage Vref with internal power supply voltage intVcc, and a PMOS receiving at its gate an output from the current mirror amplifier. Further, the voltage down converter includes a .phi.s generating circuit for generating a signal .phi.s before the operation of sense amplifier, and a PMOS receiving at its gate the signal .phi.s. Voltage down converter generates the internal power supply voltage intVcc such as shown in FIG. 8, before the operation of sense amplifier. Therefore, the voltage down converter can supply a stable internal power supply voltage intVcc, and prevents considerable lowering of the level of the internal power supply voltage intVcc caused by the operation of the sense amplifier.
REFERENCES:
patent: 5046052 (1991-09-01), Miyaji et al.
patent: 5153452 (1992-10-01), Iwamura et al.
patent: 5249155 (1993-09-01), Arimoto et al.
"A 45-ns 16-Mbit DRAM with Triple-Well Structure" IEEE Journal of Solid-State Circuits, vol. 24, No. 5, 1989, pp. 1170-1175.
"An Experimental 4Mb CMOS DRAM" ISSCC Digest of Technical Papers 1986, pp. 272-273.
Mitsubishi Denki & Kabushiki Kaisha
Popek Joseph A.
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