Static information storage and retrieval – Floating gate – Particular connection
Patent
1997-03-05
1998-11-24
Mai, Son
Static information storage and retrieval
Floating gate
Particular connection
36518523, 36523004, 36523008, G11C 1604, G11C 1606
Patent
active
058416960
ABSTRACT:
A non-volatile memory that allows simultaneous reading and writing operations by time multiplexing a single x-decode path between read and write operations. This is accomplished using appropriate timing signals to store/latch a first word line for a first operation and then relinquishing the x-decode path so that a second operation can load an address and access a second word line.
REFERENCES:
patent: 4752871 (1988-06-01), Sparks et al.
patent: 5007022 (1991-04-01), Leigh
patent: 5241510 (1993-08-01), Kobayashi et al.
patent: 5245572 (1993-09-01), Kosonocky et al.
patent: 5276642 (1994-01-01), Lee
patent: 5355334 (1994-10-01), Koga et al.
patent: 5361343 (1994-11-01), Kosonocky et al.
patent: 5506810 (1996-04-01), Runas
patent: 5684752 (1997-11-01), Mills
patent: 5691955 (1997-11-01), Yamauchi
Atmel, 4 Megabit 2.7-volt Battery-Voltage.TM.0 Flash with 256 K EEPROM CMOS Combination Memory--AT29BV432 AWAKE.TM. Memory Architecture.
Atmel, 4 Megabit 5-volt Flash with 256K E.sup.2 PROM Memory--AT29C432 ConcurrentFlash.TM..
J., Kruckeberg, "Zweigeteiltes EEPROM: Gleichzeitig auslesen und beschreiben," Elektronik, No. 26, 1990, pp. 56-59.
Chang Chung K.
Chen Johnny C.
Advanced Micro Devices , Inc.
Mai Son
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