Controllable delay logic circuit for providing variable delay ti

Details Controllable delay logic circuit for providing variable delay ti Controllable delay logic circuit for providing variable delay ti

1990-10-31

1993-12-14

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307597, 307603, H03K 1920, H03K 513

Patent

active

052705862

ABSTRACT:
A controllable delay logic circuit includes a differential circuit having first and second transistors, a first load coupled between a first power supply line and the collector of the first transistor, a second load coupled between the first power supply line and the collector of the second transistor, and a constant-current source connected between a second power supply line and the emitters of the first and second transistors. The controllable delay logic circuit also includes a first power source, a first current path circuit having a first resistor and selectively allowing a first current to pass through the first transistor from the first power source via the first resistor, and a second current path circuit having a second resistor and selectively allowing a second current to pass through the second transistor from the first power source via the second resistor.

REFERENCES:
patent: 4641048 (1987-02-01), Pollock
patent: 4713560 (1987-12-01), Herndon
patent: 4893036 (1990-01-01), Hester
patent: 4999519 (1991-03-01), Kitsukawa et al.
patent: 5066877 (1991-11-01), Hamano et al.
"Time Delay Circuit for Pulse Signal", IBM Technical Disclosure Bulletin, vol. 30, No. 3, Aug., 1987.

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