Process for manufacturing a semiconductor device by applying a n

Fishing – trapping – and vermin destroying

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437 40, 437101, H01L 21265, H01L 2120

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active

056122306

ABSTRACT:
An insulated gate type transistor includes a plurality of major electrode regions, a channel region provided between the plurality of major electrode regions, a gate electrode provided on the channel region with a gate insulating film therebetween, and a semiconductor region provided in contact with the channel region, the semiconductor region having the same conductivity type as that of the channel region and a higher impurity concentration than the channel region. The gate electrode has at least two opposing portions. The plurality of major electrode regions are provided on an substrate insulating film. The transistor is activated in a state where the semiconductor region is maintained at a predetermined voltage. A semiconductor device includes a plurality of memory cells, each of which includes the aforementioned insulated gate type transistor and an electrically breakable memory element provided on one of the major electrode regions.

REFERENCES:
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patent: 4479297 (1984-10-01), Mitzutani et al.
patent: 4571609 (1986-02-01), Hatano
patent: 4619033 (1986-10-01), Jastrzebski
patent: 4763183 (1988-08-01), Ng et al.
patent: 4810664 (1989-03-01), Kamins et al.
patent: 5016070 (1991-05-01), Sundaresan

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