Process for manufacturing a semiconductor package having two row

Details Process for manufacturing a semiconductor package having two row Process for manufacturing a semiconductor package having two row

1993-10-08

1995-05-09

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437217, 437220, 257696, H01L 2156, H01L 2158, H01L 2160

Patent

active

054139708

ABSTRACT:
A process for manufacturing a semiconductor package having two rows of interdigitated leads. The two rows of leads (14, 16) are affixed on and extend from one side of the semiconductor package (10). The two rows of leads (14, 16) are interdigitated with each other in a non-contacting manner. The end portions of the leads (17) are further shaped to form a contact surface for soldering to electrical conductors on a printed circuit board.

REFERENCES:
patent: 2734151 (1956-07-01), Jacobs
patent: 3524108 (1970-10-01), English
patent: 4967262 (1990-10-01), Farnsworth
patent: 4975763 (1990-12-01), Baudouin et al.
patent: 5204287 (1993-04-01), McLellan et al.
patent: 5275975 (1994-01-01), Baudouin et al.
patent: 5305179 (1994-04-01), Sono et al.

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