Method for manufacturing a dynamic random access memory cell

Fishing – trapping – and vermin destroying

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437 47, 437 60, 437919, H01L 2170

Patent

active

052702391

ABSTRACT:
A method for manufacturing a DRAM Cell of a highly integrated semiconductor device is disclosed. In order to realize a high integration using a DRAM cell, a projection having a non-etched part of a substrate is formed on the predetermined area of a substrate and a gate oxide layer and a gate electrode are formed on the side wall around the projection. A source electrode is formed on the upper part of the projection. A drain electrode is formed on the substrate that surrounds the lower part of the projection. An intermediate insulating layer is formed on the upper part of the lower substrate and the gate electrode. A charge storage electrode that is connected to the source electrode of the projection is formed in such a way that it encompasses the projection. A dielectric layer is formed on the upper part of the charge storage electrode. A plate electrode is formed on the upper part of the dielectric layer.

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patent: 5001078 (1991-03-01), Wada
patent: 5068200 (1991-11-01), Kang et al.
patent: 5106775 (1992-04-01), Kaga et al.
patent: 5162250 (1992-11-01), Clark

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