Apparatus for write handshake in high-speed asynchronous bus int

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Details

3642285, 3642291, 3642601, 3642707, 364DIG1, 3642401, G06F 1516

Patent

active

050704435

ABSTRACT:
Write handshake circuitry for an asynchronous bus interface system transferring data between sending and receiving computer systems including apparatus for providing a pre-acknowledge signal during the idle condition of the interface system to indicate to the sending computer system that the receiving system is ready to accept data, apparatus for synchronizing the pre-acknowledge signal to the clock of the sending computer system during the idle condition of the interface system, apparatus for providing a write signal from the sending computer system to indicate to the receiving computer system that the sending computer system is writing to the receiving computer system, and apparatus in the receiving system for receiving and synchronizing data upon the appearance of the write signal.

REFERENCES:
patent: 3975712 (1976-08-01), Hepworth et al.
patent: 3979732 (1976-09-01), Hepworth et al.
patent: 4488226 (1984-12-01), Wagner et al.
patent: 4873703 (1989-10-01), Crandall et al.
patent: 4897779 (1990-01-01), Dickson et al.

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