1990-03-20
1991-12-03
Jackson, Jr., Jerome
357 34, 357 43, H01L 2972, H01L 2710
Patent
active
050703811
ABSTRACT:
The described embodiments of the present invention provide a structure and method for easily incorporating a high voltage lateral bipolar transistor in an integrated circuit. A buried base contact is formed and the base itself is formed of a well region in the integrated circuit. An oppositely doped well region is formed surrounding the collector region in the lateral PNP transistor. This collector well is formed of the opposite conductivity type of the base well. Contact to the collector and a heavily doped emitter are then formed in the collector well and base well, respectively. The more lightly doped collector well provides a thick depletion region between the collector and base and thus provides higher voltage operation. The positioning of the base/collector junction to the collector well at base well junction also reduces the spacing between the collector and the emitter. This reduced spacing provides greater carrier injection from the forward biased base/emitter junction to the reverse biased base/collector junction. Thus, the performance of the lateral PNP transistor is improved. This structure is easily incorporated with standard BiCMOS processing and may be incorporated with other bipolar processing.
REFERENCES:
patent: T861057 (1969-04-01), Lin
patent: 4264382 (1981-04-01), Anantha et al.
patent: 4404738 (1983-09-01), Sasaki et al.
Scott David B.
Tran Hiep V.
Comfort James T.
Jackson, Jr. Jerome
Sharp Melvin
Sorensen Douglas A.
Texas Instruments Incorporated
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