SR latch circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307443, 307451, 3072723, 307279, H03K 3284, H03K 326

Patent

active

050516108

ABSTRACT:
An SR latch is provided, which comprises a D-type latch and a logic circuit connected between data and sense input of the D-type latch and set and reset input terminals of the SR latch circuit. The logic circuit establishes the logic levels of signals applied to the data and sense inputs of the D-type latch such that said SR latch circit can assume one of set, reset and hold states depending on the combination of the logic levels of the signals applied to the set and reset input terminals.

REFERENCES:
patent: 3609569 (1970-07-01), Todd
Taub et al., Digital Integrated Electronics McGraw-Hill, Inc. 1977.
Introduction to NMOS CMOS VLSI System Design, pp. 81-82 Prentice-Hall.

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