Program counter and indirect address calculation system which co

Details Program counter and indirect address calculation system which co Program counter and indirect address calculation system which co

1991-09-04

1993-07-06

Fleming, Michael R.

Boots, shoes, and leggings

3642551, 3642513, 3642624, 364DIG1, 395400, G06F 934, G11C 800

Patent

active

052261298

ABSTRACT:
A processor capable of processing a variable word length instruction has a program counter controlled to indicate the head of an instruction by the value of the program counter. There are provided an adder for summing the length of decoded portions in the variable word length instruction in accordance with the progress of the instruction decoding, and another adder for adding the length of the decoded instruction portions to the program counter so as to update the program counter. Further, there is provided a circuit for calculating an operand effective address by using the value of the program counter in the course of the variable word length instruction decoding. Thus, the updating of the program counter and the generation of the effective address are concurrently executed.

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"Encyclopedia of Computer Science and Engineering"-Anthony Ralston, Second Edition, Edwin D. Reilly, Jr. 1982 pp. 1220 and 1221.

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