Metal treatment – Compositions – Heat treating
Patent
1974-07-10
1976-01-20
Rutledge, L. Dewayne
Metal treatment
Compositions
Heat treating
148175, 148188, 357 91, H01L 21265
Patent
active
039335291
ABSTRACT:
A process for the production of a pair of complementary field effect transistors which have very short channel lengths. A lightly doped semiconductor layer is deposited on an electrically insulating substrate. A gate insulator layer is applied onto which first and second gate electrodes are formed for the two transistors. A masking oxide layer is applied to the exposed surface regions of the gate insulating layer and the gate electrodes. An opening is etched into the masking layer and gate insulator layer lying adjacent each gate electrode. Charge carriers of first and second types are diffused through the respective openings into the region of the semiconductor layer lying below to dope the same. This doping extends partially into the semiconductor region lying beneath a portion of the respective gate electrodes. All parts of the gate insulator layer except those parts lying beneath the gate electrodes are removed. Charge carriers of the second and first type are diffused into the semiconductor layer on opposite sides of the first and second gate electrodes, respectively, while leaving a portion of the first and second doped regions unchanged beneath the first and second gate electrodes. The doped regions of the semiconductor layer on opposite sides of the first and second gate electrodes provide the source and drain regions of the first and second field effect transistors, respectively.
REFERENCES:
patent: 3436817 (1969-04-01), Lane
patent: 3602781 (1971-08-01), Hart
patent: 3728591 (1973-04-01), Sunshine
patent: 3739273 (1973-06-01), Hara
patent: 3745072 (1973-07-01), Scott, Jr.
patent: 3749614 (1973-07-01), Boleky et al.
patent: 3846194 (1974-11-01), Dumin
Davis J. M.
Rutledge L. Dewayne
Siemens Aktiengesellschaft
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