Patent
1996-05-02
1997-08-12
Oberley, Alvin P.
395849, 395427, 395500, G06F 1310
Patent
active
056574827
ABSTRACT:
An interface between a peripheral device and bus in a synchronous system that is capable of operating at a plurality of clock frequencies. The interface optimizes the number of states used in a time-dependent peripheral device operation by considering the length of the time interval between clock cycles for the clock frequency at which the system is operating.
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Micron Electronics Inc.
Oberley Alvin P.
Richey Michael T.
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