Patent
1995-06-01
2000-02-08
DeCady, Albert
G06F 1100
Patent
active
060235616
ABSTRACT:
A trace analysis system for tracing the operation of a processor. The trace analysis system includes a process data module and a process instructions module. The process data module processes data accesses of selected test data. The process instruction module processes instruction execution of the selected test data based upon the detection of a non-sequential instruction having a target address. The process instructions module uses the target address of the non-sequential instruction to determine an instruction sequence.
REFERENCES:
patent: 4694420 (1987-09-01), Petter et al.
patent: 5321828 (1994-06-01), Phillips et al.
patent: 5357626 (1994-10-01), Johnson et al.
patent: 5446876 (1995-08-01), Levine et al.
patent: 5491793 (1996-02-01), Somasundaram et al.
Advanced Micro Devices, Inc., Am29040 Microprocessor User's Manual 29K Family, 1994, Chapter 12 pp. 12/1-12/26.
James R. Larus, Efficient Program Tracing, May 26, 1993, pp. 52-61, University of Wisconsin-Madison, 8153 Computer No. 5 Los Alamitos, CA, US.
N. N. Bezrukov, Neuristic Methods of Improving Disassembly Quality, Dec. 17, 1986, pp. 195-203, Translated from Programmirovanie, No.4 , 1989 Plenum Publishing Corporation.
Source Level Debugging Using A Window Interface, Advanced Micro Devices, Programming the 29K.TM. RISC Family, Second Edition, .COPYRGT.1995, Chapter 7.7, pp. 376-382.
Advanced Micro Devices , Inc.
De'cady Albert
Terrile Stephen A.
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