Patent
1997-07-24
1999-11-30
Stamber, Eric W.
395702, G06F 1750
Patent
active
059957360
ABSTRACT:
An integrated circuit modeling system facilitates automatic design of register based hardware devices by generating major pieces of the development outputs from a single input, such as a single register specification source file. The modeling code is kept coherent for all major phases of design and testing. The register specification source file contains all the register information about the device being developed. For example, each register defined in the file contains information about its offset (within its register space), access permissions, size, and field specifications. The system uses a series of associated pre-stored modeling templates in different programming languages, that access the register specification source file and automatically generate behavioral model register code and IC simulation code.
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Jain, "A Comprehensive Pre-RTL IC Design Methodology," Proceedings of the 1995 Verilog HDL Conference, pp. 119-126, Mar. 1995.
Aleksic Milivoje
Sniderman Bryan S.
ATI Technologies Inc.
Broda Samuel
Stamber Eric W.
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