Semiconductor integrated circuit device with dummy pattern for e

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

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Details

257296, 257306, H01L 27108, H01L 2976, H01L 31119, H01L 2994

Patent

active

060230991

ABSTRACT:
A semiconductor static random access memory device has a memory cell array assigned a central area of a major surface of a silicon substrate and a peripheral circuit assigned a peripheral area of the major surface, and the memory cell array and the peripheral circuit are covered with a multiple-layered inter-level insulating structure; and the memory cells are associated with various conductive lines extending on different inter-level insulating layers, and dummy strips are inserted on the different inter-level insulating layers so as to make the multiple-layered inter-level insulating structure constant in thickness, thereby preventing a gate electrode of a component bulk transistor of the peripheral circuit from over-etching during formation of contact holes.

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