Read-only memory with identification pattern

Details Read-only memory with identification pattern Read-only memory with identification pattern

1990-01-19

1990-08-21

James, Andrew J.

357 59, H01L 2712

Patent

active

049511165

ABSTRACT:
A semiconductor device of this invention such as a read-only memory has element areas on the substrate surface surrounded by a field SiO.sub.2 layer with its surface etched according to a pattern so that the type of the chip can be identified easily by visual inspection.

REFERENCES:
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patent: 4012762 (1977-03-01), Abe et al.
patent: 4199380 (1980-04-01), Farrell et al.
patent: 4233091 (1980-11-01), Kawabe
patent: 4353086 (1982-10-01), Jaccodine et al.
patent: 4498227 (1985-02-01), Howell et al.
Clark, K. G., "Automatic Mask Alignment in MOS/LSI Processing", Microelectronics, vol. 3, No. 9, pp. 47-55 (1970).
Ghandhi, VLSI Fabrication Principles, pp. 544-546, John Wiley, 1983.
Carr, W. N., et al., MOS/LSI Design and Application, McGraw-Hill, 1972, pp, 308-309.

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