1985-01-03
1990-08-21
Larkins, William D.
357 239, 357 45, H01L 27105
Patent
active
049511114
ABSTRACT:
An integrated circuit device includes insulated-gate field effect transistors employing a semiconductor gate electrode used as a logic element. Part of the input interconnection layer serves as the semiconductor gate electrode and orthogonally intersects with a conductive layer. The logic circuits are interconnected to constitute a random gate logic circuit that can be operated at high speeds and formed with a high density.
REFERENCES:
patent: 3475621 (1969-10-01), Weinberger
patent: 3541543 (1970-11-01), Crawford et al.
patent: 3821781 (1974-06-01), Chang et al.
patent: 3891190 (1975-06-01), Valasz
patent: 3987418 (1976-11-01), Buchanan
Crawford, MOSFET in Circuit Design (McGraw-Hill, NY, 1967) pp. 113-115.
Rodgers, IEEE J Solid State Circuits vol. SC9, no. 5, Oct. 1974, pp. 247-249.
Faggin et al., Solid State Electronics, vol. 13, Aug. 1970, p. 1143.
Boysel, Electronics, Feb. 6, 1967, pp. 92-97.
Larkins William D.
Nippon Electric Co. Ltd.
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