Sampled data processing system having memory with areas alternat

Details Sampled data processing system having memory with areas alternat Sampled data processing system having memory with areas alternat

1978-09-21

1981-09-01

Chapnick, Melvin B.

Boots, shoes, and leggings

G06F 305, G06F 1300

Patent

active

042875587

ABSTRACT:
A system for processing data received in the form of sample pulses has a memory with first and second major memory areas. A buffer register stores data temporarily to enable an interface between the timing of the system and of a sampled analog signal. A central processor processes data stored in one major memory area while data stored in the other major memory area is being transferred between the memory and the buffer register. The data transfer occurs during time periods while the central processor does not have access to the memory. One data item is outputted for each sample pulse received. This way, the cycle time of the sample pulses may be much greater than the cycle time of the central processor.

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