Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Patent
1997-04-24
1999-11-30
Nguyen, Vinh P.
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
324750, G01R 3128
Patent
active
059949112
ABSTRACT:
An approach using two terminal current measurements, preferably in a cyclic current-voltage sweeping procedure, and specialized test structure, is shown to be very useful in detecting processing induced changes in poly-Si/ultra-thin SiO.sub.2 /substrate Si structures. The charging current structure discernible in this approach is seen to have different features depending on processing history of the device. This is shown for the specific case of plasma gate definition etching with or without annealing.
REFERENCES:
patent: 3636450 (1972-01-01), Griffin
patent: 5053699 (1991-10-01), Aton
patent: 5659244 (1997-08-01), Sakaguchi
patent: 5804980 (1998-09-01), Nikawa
Uwasawa et al; "Scaling Limitation of Gate Oxide in P+ Polysilicon Gate MOS Structures For Sub Quarter Micron CMOS Device"; 1993 IEEE; pp. 895-898, unavailable month.
Awadelkarim Osama O.
Fonash Stephen J.
Okandan Murat
Ozaita-Mintegui Maria M.
Monahan Thomas J.
Nguyen Vinh P.
The Penn State Research Foundation
LandOfFree
Method and apparatus testing IC chips for damage during fabricat does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus testing IC chips for damage during fabricat, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus testing IC chips for damage during fabricat will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1677407