Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board
Patent
1976-08-18
1978-02-28
Kendall, Ralph S.
Coating processes
Electrical product produced
Integrated circuit, printed circuit, or circuit board
427 99, 427250, 427259, 156656, 156661, B05D 132, B05D 512, C23C 1302
Patent
active
040768600
ABSTRACT:
A method of forming electrode wirings for semiconductors devices. A first photoresist pattern is formed on the surface to be provided with electrode wirings in the configuration of an inverse pattern to the electrode wirings, and on the top of this pattern-containing surface is vapor deposited, a conductor of electrode material. On the conductor layer, a second photoresist layer is applied. This photoresist layer is etched until only the upper surface of the part of the conductor layer located above the first photoresist pattern, is exposed, thereby forming a second photoresist pattern. Then, by etching the aforementioned conductor layer with this second photoresist patterns as the etching mask, only the part of the conductor layer which is not to constitute the electrode wirings is removed. By this method, thicker electrode wirings than those formed by the conventional lift-off method may readily be formed.
REFERENCES:
patent: 2989385 (1961-06-01), Gianola
patent: 3115423 (1963-12-01), Ashworth
patent: 3725743 (1973-04-01), Murayama
patent: 3794536 (1974-02-01), Muska
patent: 3957552 (1966-05-01), Ahn
Kendall Ralph S.
Matsushita Electric - Industrial Co., Ltd.
Varndell, Jr. R. Eugene
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