Digital muting circuit

Details Digital muting circuit Digital muting circuit

1987-10-26

1989-03-07

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Using shift register

375104, 360 32, G06F 1110

Patent

active

048113700

ABSTRACT:
A first digital sound data of N-bits delivered from the input terminal is controlled by a mute control signal indicating either on-mute state signifying the state where mute operation is conducted or off-mute state signifying the state where no mute operation is conducted. This circuit includes a level control circuit, a register, a bit shift circuit, and a data selector. The level control circuit outputs a second digital sound data corresponding to the soundless state at the time of on-mute. It outputs data of which level gradually rises from the level of the soundless state to the level indicated by the first digital sound data at the beginning of off-mute and outputs the first digital duration at times subsequent thereto. Thus, for a duration at the beginning of off-mute, sound volume gradually rises. The register and the bit shift circuit gradually attenuate the first digital sound data to the level of the soundless state. Thus, for a duration at the beginning of on-mute, sound volume gradually lowers. The data selector selects the lowering operation by the time the above-mentioned rising operation is conducted, thus permitting a normal mute operation.

REFERENCES:
patent: 4291405 (1981-09-01), Jayant et al.
patent: 4430742 (1984-02-01), Milleker et al.
patent: 4637036 (1987-01-01), Kobari
patent: 4682332 (1987-07-01), Okamoto et al.

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