Method for manufacturing shallow trench isolation regions

Details Method for manufacturing shallow trench isolation regions Method for manufacturing shallow trench isolation regions

1998-10-13

1999-11-30

Dang, Trung

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438424, 438435, 438437, 148DIG50, H01L 2176

Patent

active

059942010

ABSTRACT:
A method for manufacturing shallow trench isolation regions according to the invention uses a first stop layer and a second stop layer as two polishing stop layers, or a polishing stop layer and an etching stop layer, respectively. By performing chemical mechanical polishing twice, or performing chemical mechanical polishing one time and then etch back, the influence on subsequently formed shallow trench isolation regions caused by different sizes and densities thereof can be greatly alleviated.

REFERENCES:
patent: 5229316 (1993-07-01), Lee et al.
patent: 5382541 (1995-01-01), Bajor et al.
patent: 5397731 (1995-03-01), Takemura
patent: 5506168 (1996-04-01), Morita et al.

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