High speed logic circuit having feedback to prevent current in t

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307443, 307450, 307548, H03K 19017

Patent

active

048109690

ABSTRACT:
An improved FET capacitance driver logic circuit having an inverter feedback stage 22 connected from output to input of output FET 23 to allow the output FET to have a large capacitance charging current surge followed by a reduced conduction thereafter.

REFERENCES:
patent: 4096398 (1978-06-01), Khaitan
patent: 4275313 (1981-06-01), Boll et al.
patent: 4347447 (1982-08-01), Proebsting
Lehovec et al., "Analysis of GaAs FET's for Integrated Logic", IEEE T.E.L.D., vol. ED-27, No. 6, Jun. 1980, pp. 1074-1091.

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