Technique for fabricating a sidewall base contact with extrinsic

Details Technique for fabricating a sidewall base contact with extrinsic Technique for fabricating a sidewall base contact with extrinsic

1986-04-21

1987-11-03

Roy, Upendra

Fishing, trapping, and vermin destroying

357 34, 437 63, 437191, 148DIG116, H01L 21263, H01L 21203

Patent

active

047035544

ABSTRACT:
The disclosure relates to a bipolar transistor having reduced base-collector capacitance and a method of making the transistor by forming a sidewall base contact with polycrystalline silicon-on-insulator. The structure is achieved by using differential oxidation to grow thicker oxide over heavily doped N+ regions in a sacrificial polycrystalline silicon layer with the sidewall base region being protected from doping by a sidewall oxide and limited anneal of the N+ dopant. Both NPN and PNP bipolar transistors with minimum collector-base capacitance can be fabricated using this technique.

REFERENCES:
patent: 4101350 (1978-07-01), Possley et al.
patent: 4338138 (1982-07-01), Cavaliere et al.
patent: 4378630 (1983-04-01), Horng et al.
patent: 4571817 (1986-02-01), Birritella et al.
patent: 4615746 (1986-10-01), Kawakita et al.

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