Patent
1993-05-27
1996-07-30
Beausoliel, Jr., Robert W.
39518220, 39518212, G06F 1134
Patent
active
055420427
ABSTRACT:
A method and apparatus for monitoring validity of a volatile memory of a microcomputer in an electrical circuit supplied with electrical power. Loss of electrical power is sensed and upon sensing loss of power, counter is initialized. Data is obtained from a first critical memory location in the volatile memory and is stored in a second non-critical memory location in the volatile memory which is used for operating data storage during normal powered operation of the circuit. The circuit is then sensed for return of electrical power. Upon resumption of power, the data in the first memory location is compared with the data stored in the second memory location. If detection of a variance of data contents occurs between the first memory location and the second memory location, volatile memory is reset from a preset instruction. If no variance is detected, operation of the circuit is resumed utilizing the data stored in the first memory location.
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Beausoliel, Jr. Robert W.
Chung Phung M.
Davis Mark A.
Krefman Stephen D.
Rice Robert O.
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