Error tracking apparatus in a data processing system

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371 49, 371 16, G06F 1100

Patent

active

046791957

ABSTRACT:
Disclosed is an error tracking apparatus for a data processing system having a plurality of data locations. At each data location at which an error is to be detected, an error detection means is provided for generating an error signal upon the detection error. Associated each error detection means is a counter means for counting system cycles and storing a system cycle count. Upon the generation of an error signal, the counter means stops counting, thereby freezing the system cycle count at a value corresponding to the occurrence of the error. The error signal is propagated through the system to generate a machine check which disables the system clock, thereby stopping the balance of the counter means at some cycle subsequent to the first detection of the error. By interrogation the system cycle counts stored in each of the counter means, an error history can be determined for the data processing system.

REFERENCES:
patent: 4381563 (1983-04-01), Groom
patent: 4395755 (1983-07-01), Wekai
patent: 4423508 (1983-12-01), Shiozaki
patent: 4453210 (1984-06-01), Suzuki
patent: 4593391 (1986-06-01), Mizushima

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