Single chip microcomputer having an address discrimination circu

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395575, 364DIG1, 36523003, G06F 1214, G06F 1300

Patent

active

053554663

ABSTRACT:
A single chip microcomputer coupled to an external memory includes a latch circuit having a data input connected to an operation mode designation terminal and a toggle input connected to a reset terminal, so that a logical value of the operation mode designation terminal is latched in the latch circuit when a resetting state is released. An output of the latch circuit is connected to an address discriminating circuit, which also receives an address so as to discriminate whether the received address is directed to an internal read-only memory (ROM) or an external memory, so that the address discriminating circuit controls an associated selector to cause it to select the internal ROM when the received address is directed to the internal ROM, and to select the external memory when the received address is directed to the external memory or when the output of the latch circuit indicates the external memory. With this arrangement eve if the logical value of the operation mode designation terminal changes after the resetting is released, the output of the latch circuit does not change. Accordingly, when an operation is started int he external memory operation mode, the operation mode is in no way changed to the internal ROM operation mode in the course of execution of a program. Therefore, secrecy of the content of data in the internal ROM can be maintained.

REFERENCES:
patent: 4153933 (1979-05-01), Blume, Jr. et al.
patent: 4628448 (1986-12-01), Murao
patent: 4870562 (1989-09-01), Kimoto et al.
patent: 5067077 (1991-11-01), Wakimoto et al.
patent: 5155829 (1992-10-01), Koo

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