Pipeline processor, with return address stack storing only pre-r

Details Pipeline processor, with return address stack storing only pre-r Pipeline processor, with return address stack storing only pre-r

1992-09-29

1994-10-11

Bowler, Alyssa H.

Boots, shoes, and leggings

395800, 364DIG1, 3642318, 3642613, 3642624, 3642614, G06F 938, G06F 940, G06F 942

Patent

active

053554590

ABSTRACT:
A data processor in accordance with the present invention makes it possible to perform pre-branch processing with respect to a return address in the initial stage of pipeline processing also on a subroutine return instruction, and therefore by providing a stack memory (PC stack) dedicated to a program counter (PC) for storing only return addresses of the subroutine return instruction, in executing a subroutine call instruction in an execution stage of a pipeline processing mechanism, the return address from the subroutine is pushed to the PC stack, and the pre-branch processing is performed to the address popped from the PC stack in decoding the subroutine return instruction in an instruction decoding stage.

REFERENCES:
patent: 4315313 (1982-02-01), Armstrong et al.
patent: 4394729 (1983-07-01), Armstrong
patent: 4399507 (1983-08-01), Cosgrove et al.
patent: 4488227 (1984-12-01), Miu et al.
patent: 4546431 (1988-10-01), Horvath
patent: 4890221 (1989-12-01), Gage
patent: 4991090 (1991-02-01), Emma et al.
Greenfield et al; Using Microprocessors and Microcomputers The 6800 Family; 1981 pp. 6-7; 124-128.
MC68020 32-Bit Microprocessor User's Manual; 1985; p. 1-9/1-10 (FIG. 1.5).
"Branch Prediction Strategies and Branch Target Buffer Design," Lee et al, Computer, Jan. 1984.

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