Dependency checking apparatus employing a scoreboard for a pair

Details Dependency checking apparatus employing a scoreboard for a pair Dependency checking apparatus employing a scoreboard for a pair

1997-06-20

1998-07-21

Lim, Krisna

395393, G06F 938, G06F 922

Patent

active

057845883

ABSTRACT:
A dependency checking apparatus includes a scoreboard which records destination operands of instructions outstanding within the pipeline of a microprocessor. Each single precision register maps to an indication within the scoreboard. Each double precision register which does not overlap with single precision registers maps to an indication within the scoreboard. Double precision registers which overlap single precision registers map to the set of indications corresponding to the overlapping single precision registers. Dependency checking for a source operand is performed by forming a first set of indications corresponding to the double precision registers and a second set of indications corresponding to the single precision registers, then selecting a dependency indication from these sets of indications in response to the source precision and the source register address. By forming the first and second sets of indications, the source register address can be used directly to select the dependency indication from each of the first and second sets of indications.

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Patterson et al., Computer Architecture: A Quantitative Approach, Morgan Kaufman Publishers, 1990, pp. 291-299.

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