Priority detecting counter device

Details Priority detecting counter device Priority detecting counter device

1995-09-25

1997-08-12

Malzahn, David H.

Boots, shoes, and leggings

36471504, G06F 700

Patent

active

056572603

ABSTRACT:
It is an object to measure the number of "zeros" standing from the head of an input bit string at a very high speed. A bit string D15-D0 of 16 bits is sequentially inputted to first blocks B7-B0 by each 2 bits. An AND circuit 1 and an OR circuit 2 in the first block detect that the bit string attains "01", "00", respectively. A first multiplexer circuit 9 in each second block B13-B10 selectively recognizes "01", "01" of the bit string, an AND circuit 7 detects that all of one of inputs are "0" and the others are not all "0", and an OR circuit 8 detects that all are "0", respectively. The respective parts function similarly. As a result, the signal E0-E5 is outputted as a 5-bit data signal indicating the number of "zeros" standing from the head of the input bit string in the binary notation.

REFERENCES:
patent: 4064421 (1977-12-01), Gajski et al.
patent: 4773033 (1988-09-01), Ikumi
patent: 4785421 (1988-11-01), Takahashi et al.
patent: 5111415 (1992-05-01), Shackleford
patent: 5345405 (1994-09-01), Walsh et al.
patent: 5383142 (1995-01-01), Chung
patent: 5568410 (1996-10-01), Bechade
patent: 5576982 (1996-11-01), Wu et al.

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