Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1989-09-08

1991-05-14

Popek, Joseph A.

Static information storage and retrieval

Addressing

Plural blocks or banks

365233, 365207, G11C 706

Patent

active

050162241

ABSTRACT:
First sense amplifiers formed of N-channel transistors are disposed between first and second memory cell blocks. Second sense amplifiers formed of P-channel transistors are disposed between second and third memory cell blocks. Switching transistors are disposed between the sense amplifiers and the memory cell blocks in order to select a particular memory cell block in response to signals applied to the gates thereof.

REFERENCES:
patent: 4366559 (1982-12-01), Misaizu et al.
patent: 4596001 (1986-06-01), Baba
patent: 4807194 (1989-02-01), Yamada et al.
Lee et al., "A 64Kb MOS Dynamic RAM," IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pp. 146-147, Feb. 1979.
Fujii et al., "A 50-uA Standby 1Mx1/256Kx4 CMOS DRAM with High-Speed Sense Amplifier," IEEE Journal of Solid-State Circuits, vol. SC-21, No. 5, pp. 643-648, Oct. 1986.

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