Method for designing pass transistor asynchronous sequential cir

Details Method for designing pass transistor asynchronous sequential cir Method for designing pass transistor asynchronous sequential cir

1988-12-09

1990-03-27

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307468, 307469, 3074651, 364716, 364784, 34082584, 34082586, 34082587, 34082591, H04Q 100, H03K 17693, H03K 19096, H03K 301

Patent

active

049123483

ABSTRACT:
A method for designing and constructing pass transistor asynchronous sequential circuits, and a class of pass transis tor asynchronous sequential circuits designed in accordance with the inventive method. The inventive circuit design method generates a design for each next state variable, Y.sub.i, of an asynchronous pass transistor circuit, where each design corresponds to a portion of the circuit. In a first preferred embodiment, the invention produces an asynchronous circuit design comprising a pass transistor network and a buffer (having no long term memory) for receiving the output of the pass transistor network. In a second preferred embodiment, the inventive method results in a critical race free, asynchronous circuit design comprising an enable pass transistor network, a disable pass transistor network, and a buffer (including a memory) for receiving the output of both pass transistor networks. In either embodiment, the invention results in circuits comprising pass transistor networks that are identical in structure for each next state variable Y.sub.i (although different sets of constant input signals are applied to each network). It is within the scope of the invention to design and construct circuits having this architecture in accordance with a structured layout including an input section, a logic section implementing the next state functions, a buffer section, and a feedback section. The logic section preferably includes a pass transistor matrix programmed with either a diffusion-contact-metal transistor structure or a metal jumper structure. The feedback lines preferably are metal lines that are programmed by making contact with the gate lines feeding the pass transistors.

REFERENCES:
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patent: 4453096 (1984-06-01), Le Can et al.
patent: 4808844 (1989-02-01), Ozaki et al.
patent: 4825107 (1989-04-01), Naganuma et al.
patent: 4857773 (1989-08-01), Takata et al.
patent: 4857774 (1989-08-01), El-Ayat et al.
patent: 4870302 (1989-10-01), Freeman

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