Addressing technique employing both direct and indirect register

Details Addressing technique employing both direct and indirect register Addressing technique employing both direct and indirect register

1974-09-16

1976-03-23

Shaw, Gareth D.

Communications: electrical

Digital comparator systems

G06F 1300

Patent

active

039463664

ABSTRACT:
A serial buss processor with detailed description of program branching and register addressing. A mask and branch instruction is utilized to effect a relative program branch of up to N + 1 address locations away from the address of the current or masking branch instruction, where N is the number of bits in the data operand. Register addressing is partly direct and partly indirect. The indirect register address scheme employs a directly addressable register, the contents of which are interpreted by an indirect address generator unit which itself is directly addressable such that a single value in the directly addressable register may be used to point to different registers.

REFERENCES:
patent: 3249920 (1966-05-01), Pulver
patent: 3270324 (1966-08-01), Meade
patent: 3500337 (1970-03-01), Womack
patent: 3614741 (1971-10-01), McFarland

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