Analog to digital converter with a differential output resistor-

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341150, H03M 166, H03M 112

Patent

active

06144331&

ABSTRACT:
An improved successive-approximation type ADC that uses both charge-scaled and voltage scaled approximation. The present invention provides a high noise immunity, high speed ADC using a differential voltage scaled DAC. The differential voltage scaled output scheme of the present invention advantageously applies voltage scaling to a capacitor on both inputs to the comparator. The dual voltage scaling is preferably done by connecting two switches to each tap on the bottom half of a resistor string, and no switches to the top half of the resistor string, using one set of tap switches for adjusting a charge on capacitor on the first input of the comparator and the second set of tap switches for adjusting a charge on capacitor on the second input of the comparator.

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Holberg, Allen, "10.6 Mediium-Speed A/D Converters", CMOS Analog Circuit Design, CMOS Digital-Analog and Analog-Digital Converters, p. 560-565.
Hae-Seung Lee, et al., "A Self-Calibrating 15 Bit CMOS A/D Converter", IEEE Journal ofSolid-State Circuits, vol. Sc-19, vol. SC-19, No. 6, Dec. 1984, p. 813-819.

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