Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Patent
1998-06-15
2000-11-07
Tsai, Jey
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
438119, 438131, 438281, 438292, 438293, 438333, 438351, 438466, H01L 2144, H01L 2148, H01L 2150, H01L 2182, H01L 21336, H01L 21331, H01L 31479
Patent
active
061435864
ABSTRACT:
An electrostatic protected integrated circuit (IC) substrate and a method of making an integrated circuit package with the electrostatic protected IC substrate includes an IC substrate, having a plurality of electrical traces formed on the top of the IC substrate with the electrical traces extending from an IC chip mounting area near the center to the periphery of the IC substrate. Electrically shorting the electrical traces together with a conductive material such as conductive tape or epoxy, thereby, protecting the IC substrate against the accumulation of static charges during the assembly of the IC chip on the IC substrate. The IC chip is mounted in the mounting area on the IC substrate and the conductive material is removed before final testing.
REFERENCES:
patent: 5023202 (1991-06-01), Long et al.
patent: 5661087 (1997-08-01), Pedersen et al.
patent: 5913137 (1999-06-01), Chen
patent: 5960290 (1999-09-01), Hsu
Chia Chok J.
Low Qwai H.
Variot Patrick
Jones Josetta
LSI Logic Corporation
Tsai Jey
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