System for logical address conversion data fetching from externa

Details System for logical address conversion data fetching from externa System for logical address conversion data fetching from externa

1990-06-01

1994-01-11

Lall, Parshotam S.

Boots, shoes, and leggings

3642551, 3642566, 3642565, G06F 1210

Patent

active

052789624

ABSTRACT:
The microprocessor has an address converting buffer to convert logical addresses into physical addresses and a signal generator representing the timing for the microprocessor to retrieve conversion information from an external memory and write it into the address converting buffer. With this configuration, it is possible to determine the logical address from the physical address that was output to an external circuit, without the microprocessor outputting the logical address directly to the external circuit.

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patent: 4218743 (1980-08-01), Hoffman et al.
patent: 4574351 (1986-03-01), Dang et al.
patent: 4636940 (1987-01-01), Goodwin, Jr.
patent: 5088026 (1992-02-01), Bozman et al.
Virtual Address Trace Mechanism, Greer, et al., IBM Technical Disclosure Bulletin, vol. 26, No. 2, Jul. 1983.
"Nikkei Electronics", Nikkei McGraw-Hill, No. 414, Feb. 9, 1987, pp. 101-102.

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