Multiple processor system and output administration method there

Details Multiple processor system and output administration method there Multiple processor system and output administration method there

1991-11-25

1994-01-11

Beausoliel, Jr., Robert W.

Excavating

3642691, G06F 1108

Patent

active

052788431

ABSTRACT:
A multiple processor system comprising a plurality of microprocessors, a plurality of digital filters for making outputs of the microprocessors smooth, the digital filters corresponding in number to the plurality of microprocessors, a failure judgement unit having a comparator for comparing the smoothed output data and judging the presence of failure of the plurality of microprocessors under majority rule, and a selection and output unit for selecting, on the basis of the result of the judgement of the failure judgement unit and a predetermined priority order, an output of the microprocessor in which there is no failure and whose priority order is higher and for outputting the selected output as an output of the multiple processor system.

REFERENCES:
patent: 3681578 (1972-08-01), Stevens
patent: 3946214 (1976-03-01), Stuart et al.
patent: 4327437 (1982-04-01), Gelderloos
patent: 4629342 (1986-12-01), Futaki
patent: 4894830 (1990-01-01), Kawai
patent: 4998194 (1991-03-01), Okamoto et al.
patent: 5023804 (1991-06-01), Hoult

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