Charge coupled device shift registers having an improved regener

Details Charge coupled device shift registers having an improved regener Charge coupled device shift registers having an improved regener

1976-05-19

1977-11-29

Miller, Jr., Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307362, 307279, 307DIG3, 328154, H03K 518, H03K 3286, H03K 3353, H01L 2978

Patent

active

040607372

ABSTRACT:
Disclosed are charge coupled device shift registers having an improved regenerative charge detector. The charge detector consists of first and second non-clocked inverter stages, gating means for coupling the input of the first inverter stage to the output of the second inverter stage in response to a first clock signal, connecting means for connecting the input of the second inverter stage to the output of the first inverter stage, and feedback means for connecting the input and output of the first inverter stage in response to a second clock signal. The output of the shift register connects to the input of the first inverter stage. The registers include means for generating the first and second clock signals, and means for multiplexing the charge detector in each register to a common output.

REFERENCES:
patent: 3678473 (1972-07-01), Wahlstrom
patent: 3750155 (1973-07-01), Oman
patent: 3758794 (1973-09-01), Kosonocky
patent: 3891977 (1975-06-01), Amelio et al.
patent: 3892984 (1975-07-01), Stein
patent: 3955101 (1976-05-01), Amelio et al.
Lambrechtse et al., "FET Memory"; 1973, IEEE Int'l Solid-State Circuits Conference; p. 26; 2/14/73.
Surgent, "Insulated Gate Field-Effect Transistor Sense Amplifier Latch;" IBM Tech. Discl. Bull.; vol. 13, No. 9, pp. 2670-2671; 2/71.

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