Multi-CPU system's data I/O processor with communication arbitra

Details Multi-CPU system's data I/O processor with communication arbitra Multi-CPU system's data I/O processor with communication arbitra

1996-03-08

1998-09-22

Lee, Thomas C.

395889, 395834, 395835, 395311, G06F 1320, G06F 1336, G06F 1516

Patent

active

058128808

ABSTRACT:
A first CPU and a second CPU form a multi-CPU system which distributes processes related to data input-output and computation. Input-output devices such as an A/D converter and the like are connected to the first CPU through a bus. First and second serial communication circuits stand between the second CPU and the input-output devices of the A/D converter and the like to transmit and receive access demands from the second CPU to the input-output devices of the A/D converter and the like, and the demanded data. Also, the communication arbitration circuit stands between the first serial communication circuit and the first CPU to arbitrate access operations of the first CPU and of the second CPU to the input-output devices of the A/D controller and the like so that these access operations do not overlap.

REFERENCES:
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patent: 4514823 (1985-04-01), Mendelson et al.
patent: 4882702 (1989-11-01), Struger et al.
patent: 5089953 (1992-02-01), Ludicky

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