Method of making single-level polysilicon dynamic memory array

Details Method of making single-level polysilicon dynamic memory array Method of making single-level polysilicon dynamic memory array

1980-10-15

1984-07-03

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

29576B, 29577C, 29591, 148187, H01L 2128

Patent

active

044570660

ABSTRACT:
A dynamic read/write memory cell of the one transistor type is made by a single-level polysilicon process in which the word address lines and the bias lines for the capacitors are formed by metal strips. The gates of the access transistors and the capacitor gates are polysilicon. Metal-to-polysilicon contacts are made to connect the metal word lines to the polysilicon gates of the access transistors and to connect the metal bias lines to the capacitor gates.

REFERENCES:
patent: 4055444 (1977-10-01), Rao
patent: 4112575 (1978-09-01), Fu et al.
patent: 4164751 (1979-04-01), Tasch et al.
patent: 4239559 (1980-12-01), Ito
patent: 4240092 (1980-12-01), Kuo
patent: 4240845 (1980-12-01), Esch et al.
patent: 4357747 (1982-11-01), Kurakami et al.

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