1991-08-29
1994-03-08
Canney, Vincent P.
Excavating
395375, 371 12, 371 19, G06F 1500
Patent
active
052936139
ABSTRACT:
A Recovery Control Register is embodied as two multi-bit registers; a staged register and an immediate register. The immediate register contains the information which is read by the CP microcode and used during recovery. The staged register is a platform where a footprint can be assembled by the CP microcode before the retry checkpoint is changed. The CP microcode can operate on either register through the use of "SET", "AND" and "OR" functions. The choice of these operators as well as the decision to separate the registers into bit ranges provides the microcode with maximum flexibility when setting up new checkpoint values. When a recovery algorithm requires that the recovery footprint change immediately, microcode operates on the immediate register. If, however, the recovery footprint needs to be synchronized with the event which requires the change, for example a store being released, the microcode puts the appropriate footprint into the staged register and issues a release signal to the completion/interrupt logic within the CP. When the release is processed and broadcast as a Completion Report a variable number of cycles later, the checkpoint is advanced and the immediate register is updated in the same cycle, thereby allowing for a crisp transition from one recovery window to the next.
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IBM TDB vol.27, No. 5, Oct. 1984, pp. 2757-2759, "Exception Handling . . . Machine"by W. Brantley et al.
IBM TDB vol. 27, No. 4A, Sep. 1984, pp. 2231-2232 "Checkpoint Register" by J. A. Wetzel.
IBM TDB vol. 26, No. 9, Feb. 1984, pp. 4840-4841, "Central Processor Retry" by E. J. Annunziata et al.
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Hayden Clifford O.
Hurban Robert J.
Stillman Susan B.
Augspurger Lynn L.
Canney Vincent P.
International Business Machines - Corporation
Ludwin Richard M.
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