Method and apparatus for guaranteeing the logical integrity of d

Details Method and apparatus for guaranteeing the logical integrity of d Method and apparatus for guaranteeing the logical integrity of d

Filed on

1986-05-02

Date issued

1990-02-20

Examiner

Shaw, Gareth D.

Patent Class

Boots, shoes, and leggings

Other Related Categories

364247, 3642287, 3642318, G06F 1500

Type

Patent

Status

active

Patent number

049031961

Description

ABSTRACT:
A method and apparatus for controlling access to its general purpose registers (GPRs) by a high end machine configuration including a plurality of execution units within a single CPU. The invention allows up to "N" execution units to be concurrently executing up to "N" instructions using the GPR sequentially or different GPR's concurrently as either SINK or SOURCE while at the same time preserving the logical integrity of the data supplied to the execution units. The use of the invention allows a higher degree of parallelism in the execution of the instructions than would otherwise be possible if only sequential operations were performed.
A series of special purpose tags are associated with each GPR and execution unit. These tags are used together with control circuitry both within the GPR's, within the individual execution units and within the instruction decode unit, which permit the multiple use of the registers to be accomplished while maintaining the requisite logical integrity.

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patent: 4224664 (1980-09-01), Trinchicri
patent: 4249241 (1981-02-01), Aberle et al.
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patent: 4574349 (1986-03-01), Rechtschaffen
patent: 4574350 (1986-03-01), Starr
patent: 4604694 (1986-08-01), Hough
patent: 4794518 (1988-12-01), Mizushima
patent: 4807113 (1989-02-01), Matsumoto et al.
patent: 4807115 (1989-02-01), Torng
patent: 4809159 (1989-02-01), Sowa

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