1983-03-31
1986-11-18
Edlow, Martin H.
357 238, 357 59, H01L 2978
Patent
active
046239081
ABSTRACT:
The thin film transistor comprises a plurality of individual thin film transistors on a common insulating substrate with the plurality of individual thin film transistors being connected together in series. The gate electrode of each individual transistor of the plurality of thin film transistors is connected to form one common gate electrode for the overall transistor. Leakage current in the OFF condition is substantially reduced. Identical performance is achieved from the transistor with interchangeability in designating source and drain terminals, when a symmetry is provided such that the i-th transistor in a series of N is physically identical to the (N-i+1)-th transistor in the overall transistor.
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"High Voltage SOS/MOS Devices . . . ", R. S. Ronen, M. R. Splinter, R. G. Tremain, Jr. IEEE Journal of Solid-State Circuits vol. 5611, No. 4, Aug. 1976, 431-442.
"Application of Laser Annealing Techniques . . . ", G. Yaron, L. D. Hess, Appl. Phys. Lett. 36(3), Feb. 1, 1980, 220-222.
"N-Channel Si-Gate MOS Devices on Sapphire Substrates", H. Tango, J. Iwamura, K. Maeguchi, M. Isobe, Proc. of the 6th Conference on Solid State Devices, Tokyo, 1974, Supplement to the Journal of Japan Society of Applic. Physics, vol. 44, 1975, 225-231.
Kodaira Toshimoto
Mano Toshihiko
Oshima Hiroyuki
Crane Sara W.
Edlow Martin H.
Seiko Epson Kabushiki Kaisha
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