Semiconductor memory device with barrier layer

Details Semiconductor memory device with barrier layer Semiconductor memory device with barrier layer

1988-10-25

1990-02-20

Mintel, William

357 59, 357 71, 357 67, 357 51, 357 54, 357 2312, H01L 2978

Patent

active

049030965

ABSTRACT:
There is disclosed a memory cell in which a low resistance polycrystal silicon layer and a high resistance polycrystal silicon layer are connected to each other with a barrier metal layer provided therebetween and formed in a contact hole of an insulation film.

REFERENCES:
patent: 4278989 (1981-07-01), Baba et al.
patent: 4488166 (1984-12-01), Lehrer
patent: 4528582 (1985-07-01), Cohen et al.
patent: 4533935 (1985-08-01), Mochizuki
Murarka et al., "Refractory Silicides of Titanium and Tantaium for Low--Resitivity Gates and Interconnects," IEEE Journal of Solid--State Circuits, vol. SC--15, No. 4, Aug. 1980, pp. 474-482.
Thin Solid Films, vol. 104, No. 1/2, Jun. 1983, pp. 89-99, Lusanne, CH, Elsevier Sequoia, NL; R. J. Schutz: "Tin as a Diffusion Barrier Between CoSi2 or PtSi and Aluminum".

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