Terminal control circuitry with display list processor that fetc

Details Terminal control circuitry with display list processor that fetc Terminal control circuitry with display list processor that fetc

1990-06-01

1994-03-08

Harkcom, Gary V.

395150, 395164, 395166, G06F 1562

Patent

active

052935876

ABSTRACT:
Display control logic for a terminal controller with support for such features as windows and interlace. A display list processor (DLP) (20) communicates with a program memory (12) containing DLP instructions, a display memory (12) containing character codes and attributes for the display, and a font memory (13). As the DLP program executes, it causes accesses to the display memory and brings in character codes and attributes for ultimate display on the screen. These character codes and attributes, as well as information representative of the scan line are input to a video data queue (95). The queue entries are clocked out of the queue by a character clock (170) and are used to generate addresses to font memory. Bitmaps from font memory are read into a dot shifter (190). The DLP instruction set includes a DISPLAY STRING instruction which allows a portion of a scan line to be built up by specifying the length of the scan line segment and the starting address in memory. Thus, a scan line can be built up based on characters stored in different parts of memory. The instruction set also includes SET ROW, LOOP, and LOOPBACK instructions to specify a given row and to set up a loop so that all the scan lines in a given row of characters can be built up by repeated executions of the DISPLAY STRING instructions. It is also possible, to display the scan lines in any random scan line order.

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